Senior Verification Engineer

We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.

Taking full ownership of entire domain, defining the verification strategy, writing and executing test plan in system Verilog UVM.

About Us:

Our group is responsible for the development of NeuReality next generation SoC for AI Compute. The development starts from product definition through architecture, design, verification and up to implementation.
The complex SoC is a high-performance device running AI compute for vision and audio processing, with technologies from multi-disciplines.


  • 5+ years of experience as a Verification Engineer.
  • B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
  • Experience in pre-silicon functional unit level verification.
  • Experience in System Verilog UVM.
  • Experience in verification of complex SoC and designs.
  • Experience with AMBA protocols and NOC subsystem – is an advantage
  • Experience with CPU subsystem – is an advantage
  • Experience with NOC subsystem – is an advantage
  • Experience in leading block/cluster verification from scratch – is an advantage
  • Caesarea Main Office: 14 Tarshish Street, Industrial Park Caesarea 3079559, Israel
    Tel Aviv: 94 Igal Alon Street, Alon 2 Tower , Tel Aviv, Israel
    Poland: Fronton Kraków Business Center (Regus), ul. Kamienna 21, 31-403 Kraków, Poland
    US/California Office: 2880 Zanker Road, Suite 203, San Jose, CA 95134
  • +972 74-7023333
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